From the discovery of carbon nanotubes to the ability to prepare high-purity semiconductor carbon nanotubes in large quantities, the large-scale fabrication of carbon nanotube transistors (CNT) will become possible. In this paper, a carbon nanotube transistor featuring a buried-gate structure, employing an etching process to optimize the surface flatness of the device and enhance its performance, is presented. This CNT thin-film transistor has a current switching ratio of 104, a threshold voltage of around 1 V, and a mobility that can reach 6.95 cm2/V·s, indicating excellent electrical performance. The device achieves operational targets at low voltage, facilitating the development of small and portable electronic devices.
Keywords: carbon nanotube transistors; surface planarization; thin-film transistor.